Houston, TX – Texas Instruments' new TMS320C6457 digital signal processor (DSP) is available at speeds of 1.2 GHz and 1 GHz. The C6457 delivers up to 30 percent more performance at one-third less the cost of current single core DSP processors from TI. This performance lift is due to several memory and cache enhancements, while the cost reduction is achieved through a smaller process node. Many of these features were previously introduced in the TMS320C6474, a more-expensive, three-core DSP.
The C6457 targets networking, military, imaging and industrial markets, in applications such as medical imaging, radar, industrial vision systems and test equipment. C6457 features include:
- 9,600 (16-bit) MMACS of peak performance for a cycle for cycle performance improvement of up to 30 percent.
- Larger 2 MB on-chip L2 memory (up to 1 MB cacheable), faster 32-bit DDR2 EMIF (667 MHz) and memory, cache and bus architecture enhancements.
- Serial RapidIO (SRIO) and Gigabit Ethernet MAC serializer/deserializer (SERDES) interfaces.
- On-chip acceleration for telecommunications applications with two Turbo-Decoder Coprocessors (TCP2) and one Viterbi Coprocessor (VCP2).
Samples are available today from TI and from authorized distributors in a 23 x 23 mm BGA package. Pricing for the 1.2 GHz version is $146 USD and the 1 GHz version is $112 USD (both in 1K unit volume).
TI also offers the C6457 Evaluation Module (EVM). This development tool includes two C6457 processors, high-speed DSP interconnect with Gigabit Ethernet MAC and Serial RapidIO SERDES interfaces, embedded JTAG emulation with an XDS560T trace pod header and a board-specific Code Composer Studio Integrated Development Environment. It also includes several TI analog power management devices and a clock driver. Order entry is open for the TMDXEVM6457 at $1995 USD.
For more information on the C6457, see www.ti.com/c6457. For more on the EVM, see www.ti.com/c6457evm.
