The growing demand in multimedia video processing and its applications
owes its origin to and, at the same time, is responsible for the
further development of both hardware design and software techniques.
Aided by advancements in very large-scale integrated circuit (VLSI)
manufacturing technology that has made possible the integration of
increased functionality in smaller circuits, it is primarily the
development of novel signal-processing architectures and design
techniques that has brought audio, video, graphics, image, speech, and
text processing together.
It has also prompted advanced multimedia video applications such as
high-definition digital television, digital set-top boxes with
time-shift functionality, 3D games, H.26x video conferencing, MPEG-4
interactivity, and so forth.
The computational requirements of multimedia video processing being
dominated by signal-processing tasks that require complex and real-time
processing on high volumes of data, this chapter attempts to take a
closer look at some of the recent trends in designing integrated
circuits (ICs) for such systems.
This series of articles considers MPSoC architectures for advanced
video applications. Video applications are rapidly evolving along with
the increases in computational power supplied by Moore's Law.
Although MPSoC must be tailored to their primary application in
order to squeeze the maximum amount of performance from the available
silicon, the architecture should also be designed for flexibility in
order to maximize the utility and longevity of the design.
The computational requirements of multimedia video processing being
dominated by signal-processing tasks that require complex and real-time
processing on high volumes of data, we attempt a closer look at some of
the recent trends in designing ICs for such systems.
We first look at several video applications in order to understand
the requirements better on video MPSoCs. We of course consider video
compression, the dominant application today of digital video. We also
look at one of our own applications, the real-time gesture recognition
system designed as part of the Princeton Smart Camera Project, as an
example of a new generation of video applications.
We then spend a great deal of time identifying some of the recent
trends in the design of multimedia SoCs and use the Philips NexperiaTM
Home Entertainment Engine as a case study.
The specific topics touched on are: processor architectures, central
processing unit (CPU) configurations, system and chip integration,
intellectual property (IP) reuse, platform-based designs, communication
bus structures, and design-for-testability (DFT) issues. We close with
a brief discussion of trace-driven analysis of applications and
architectures as part of the design of video MPSoC architectures.
