Termination techniques
To avoid reflections and maintain integrity of the input video signals, the line driver output must be properly terminated. The characteristic impedance of a standard Cat 5 cable is 100 ohm which is split into two 50 ohm resistors for driving the line differentially. Figure 8 and 9 show the termination scheme on the driver and receiver sides . C1 and RT of the receiver form a low pass filter to reject high frequency common noise picked-up by the cable. C2 is used to isolate the DC voltage difference caused by grounding inequalities between the driver & receiver systems. RB sets up the bias voltage for the receiving amplifiers. The BW of the high pass filter formed by RB and C2 must be low enough to pass all the video signals. For SXGA video signals the low pass band must be less than 20Hz. A small resistor Rs is placed to isolate the input capacitance of the receiver from the PCB trace inductance to avoid LC resonance effect at the receiving amplifier inputs.
Figure 8. Cat 5 Cable Termination Scheme -- Driver Side.
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Figure 9. Cat 5 Cable Termination Scheme " Receiver Side.
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Some video systems do not have a negative supply available and require single supply operation. The above circuit shows a simple implementation of single supply operation. The video signal is AC coupled into the driver inputs and the input DC bias is setup by R1 and R2 resistors from a bias voltage. The output is centered around the bias voltage which should be set to ½ the supply voltage. AC coupling maybe needed to avoid a DC voltage presence on the line. At the receiver, the incoming video signal is first terminated into 2 50 ohm resistors. The center tap of these resistors is AC coupled to ground to eliminate high frequency common mode noise pickup by the cable. The signal is once again AC coupled into the input in the same fashion as the single supply differential line driver.
Video equalization strategies " Pre-equalization Vs Post-equalization
Figure 10 shows a very simple method of pre-equalizing the line with the inclusion of a parallel 1.6nF capacitor with the termination resistor. The 1.6nF capacitor shorts out the 50 ohm termination resistor at high frequencies and allows a larger amount of high frequency signal on the line. The 1.6nF capacitor in parallel with 50 ohm termination resistor is a single pole high pass filter with 3dB zero at 2MHz. The maximum achievable gain at high frequency is limited to 6dB because the termination resistor is shorted and all the signal is realized on the line. In this scheme, cable parasitic capacitance appears at the amplifier output and can lead to oscillation.
Figure 10. Single Pole Pre-Equalization Scheme.
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Figure 11 shows a 3 pole compensation circuit using a 1GHz bandwidth high slew rate amplifier. The circuit is configured around the gain setting resistor that sets the poles at 1.2MHz, 15MHz and 100MHz respectively. The amount of high frequency compensation is determined by the gain setting resistor. The capacitor and resistor combinations set the pole frequencies. Theoretically, this circuit can be used for both pre and post equalization. In practice the line driver slew rate and output swing limit the pre-equalization performance; for instance, a 1V 60MHz input signal becomes a 12.6V 60MHz signal at the line driver output requiring a approximately a 5KV//μS slew rate. The slew rate of the EL5166 is 5.5KV//μS with a maximum supply voltage of 12V and its maximum output swing is 8V. Most modern high speed amplifiers are built on less than 12V processes. This circuit should always be implemented in a post-equalization configuration where the incoming high frequency signal is low in amplitude
Figure 11. 3 Pole Pre-Equalization Scheme.
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Figure 12 shows a simplified block diagram of one of the 3 RGB channels in the EL9111/2, a differential line receiver with an integrated Cat 5 cable compensation network. The differential input signal is used to recover the common mode input signal which after recovery is amplified and buffered to the VCM outputs for the EL9112. The EL9111 decodes the sync information on VCM signals and outputs Hsync and Vsync. The differential input signal is buffered to drive the LOW FREQ BOOST amplifier. The high frequency components are processed in a proprietary EQUALIZING BOOST amplifier while the frequency response of this amplifier is voltage-controllable and matches cable losses. The control voltage input is the high frequency gain boost control VREF is the reference for the Control, Gain, X2 and Enable inputs. The differential signals are summed and amplified further by the variable gain (CONTRAST) amplifier. The signal level adjustment is accomplished by switching the gain with a digital control X2- of the following amplifier " X2/X1". Finally, the differential signal is converted to a single ended signal and comes out of the Vout pin. The output signal is referenced to the 0V input pin. For power economy the entire chip can be turned off with the ENBL pin.
Figure 12. EL9111 Differential Line Receiver with Cat 5 Cable Compensation.
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Figure 13 shows a 100 meter Cat 5 cable attenuations characteristic and the frequency responses of the 3 cable compensation circuits. The 1.6pF//Rout compensation circuit works well up to 10MHz. The frequency response of the 3 pole compensation circuit comes very close to matching the Cat 5 cable attenuation. EL9111 Vgain is set to 0.24V for 100 meter Cat 5 cable, the EL9111 compensates perfectly for signal frequencies up to 100MHz.
Figure 13. 100m Cat 5 Cable Attenuation and Compensation
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Video sync/timing transmission
As described earlier, the standard SXGA video consists of 5 signals " RGB video signals, vertical and horizontal sync signals. Standard Cat 5 cable has 4 pairs of twisted wires. To pass all 5 SXGA signals, one can encode the vertical and horizontal signs into a composite sync signal by using the Super Sync Separator EL4511. The composite video signal can then be transmitted through the fourth twisted wire pair of Cat 5 cable. The EL1883 can be used on the receive side to separate horizontal and vertical Sync Signals from composite Sync input signals.
In cases where the fourth twisted wire pair is not available because it is being used to pass KVM or other signals, the EL4543 is capable of encoding the Hsync and Vsync on the common mode of the video signal. The block diagram of the EL4543 is shown on figure 14. The Vsync and Hsync inputs and the common mode outputs of the EL4543 are shown in figure 15. The relationship between Hsync, Vsync and the Common Mode Outputs is shown below
Vcm-A = Vsync " Hsync
Vcm-B = -2*Vsync
Vcm-C = Vsync + Hsync
It is clearly shown that the sum of the common mode voltages results in some finite DC level with no AC content. This eliminates EMI radiation into any common mode signal along the CAT 5 cable. Hsync and Vsync can be regenerated from the voltage differences in the common mode voltages.
Figure 14. EL4543 Triple Differential Line Driver with H and V Sync Encoder.
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Figure 15. EL4543 Test results
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The EL9111 decodes the sync information on the common mode of the channels and outputs to the monitor.
Cable Delay Mismatch Compensation
As discussed previously in the CAT-5 cable characteristic section, there is mismatch in the cable length between the 4 pairs of cables. This cable mismatch leads to time skew between the RGB channels. The EL9115 is designed to provide the time delay compensation. The block diagram of the EL9115 is shown in figure 16. The time delay in the RGB channels can be independently adjusted through a serial interface. The EL9115 can provide a total 62nS delays in 2nS steps. The test results of the delay is shown in figure 17.
Figure 16. EL9115 block diagram.
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Figure 17. EL9115 delay test results.
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Other Parts to this series
Part 1 An Introduction to Twisted Pair Driver/Receiver Considerations
Part 3 (next week) The Hermes Demonstration Kit
